Catalyst
1.
Project Description
The Gentoo catalyst project develops and supports the catalyst release building
tool. The design of catalyst is meant to be easy to use, cutomize, and
maintain. It is also used in other Gentoo projects, such as GNAP.
2.
Documentation
The catalyst FAQ attempts to answer
commonly asked questions related to catalyst and its usage.
3.
Project Goals
The goal of the catalyst project is to provide a single multi-faceted tool
that can reliably build all aspects of a Gentoo Linux release: stage tarballs,
GRP package sets, and install CDs.
Our specific development goals for catalyst include the following:
ensuring it provides high-quality builds of Gentoo Linux, and for the tool to
be easy to use, customize, extend and maintain. The catalyst tool is intended
to be used by those who wish to create their own customized versions of Gentoo
Linux, or their own customized LiveCDs. Our goal is to make catalyst a powerful
tool that's a pleasure to use, and to ensure that the code we write is
maintainable and of high-quality.
4.
Developers
| Developer |
Nickname |
Role |
| Andrew Gaffney |
agaffney |
Lead |
| Matt Turner |
mattst88 |
Member ( MIPS ) |
All developers can be reached by e-mail using nickname@gentoo.org.
5.
Supported Architectures
Catalyst supports a number of architectures. In catalyst-speak, an
"architecture" is a general type of CPU platform.
For each architecture, catalyst supports a number of
"sub-architectures." A sub-architecture is a specific variant of
the architecture. For example, pentium4 is a
sub-architecture of the x86 architecture.
| Architecture |
Sub-architectures |
| alpha |
alpha ev4 ev45 ev5 ev56 ev6 ev67 pca56 |
| amd64 |
amd64 amdfam10 athlon64 athlon64-sse3 athlonfx barcelona
core2 k8 k8-sse3 nocona opteron opteron-sse3 |
| arm |
arm armeb armv4l armv4tl armv5teb armv5tejl armv5tel armv5tl
armv6j armv6z armv6zk armv7a armv7a_hardfp |
| hppa |
hppa hppa1.1 hppa2.0 |
| ia64 |
ia64 |
| mips |
cobalt loongson2e loongson2f mips mips1 mips3 mips32
mips32el mips4 mips64 mips64el mipsel mipsel1 mipsel3
mipsel4 |
| mips64 |
cobalt_n32 loongson2e_n32 loongson2f_n32 mips3_multilib
mips3_n32 mips3_n64 mips4_multilib mips4_n32 mips4_n64
mips64_multilib mips64_n32 mips64_n64 mips64el_multilib
mips64el_n32 mips64el_n64 mipsel3_multilib mipsel3_n32
mipsel3_n64 mipsel4_multilib mipsel4_n32 mipsel4_n64 |
| ppc |
g3 g4 g5 power power-ppc ppc |
| ppc64 |
970 cell power3 power4 power5 power6 ppc64 |
| s390 |
s390 |
| s390x |
s390x |
| sh |
sh sh2 sh2a sh2aeb sh2eb sh3 sh3eb sh4 sh4a sh4aeb sh4eb
sheb |
| sparc |
sparc |
| sparc64 |
sparc64 |
| x86 |
athlon athlon-4 athlon-mp athlon-tbird athlon-xp i386 i486
i586 i686 k6 k6-2 k6-3 pentium pentium-m pentium-mmx
pentium2 pentium3 pentium3m pentium4 pentium4m pentiumpro
prescott x86 |
You'll notice that all architectures have a sub-architecture with
the same name as the architecture. This sub-architecture is meant
to represent a "generic" build that should work on all systems in
that architecture.Each sub-architecture has an associated set of
CFLAGS, CXXFLAGS, as well as a CHOST and set of
USE variables that are enabled on that sub-architecture. The
USE settings are intended to enable any CPU-specific options,
such as mmx or altivec.
Note:
Catalyst currently also supports the ability to build
x86 architecture stages on amd64 systems.
|
|